| Board / SoC Family | DDR IP Vendor | Initialization Code Location | Implementation Style |
|---|---|---|---|
| NXP i.MX8M Plus EVK | Synopsys (uMCTL2) | drivers/ddr/imx/imx8m/ddr_init.c |
Structured C with Timing Structs |
| ST STM32MP157C-DK2 | Synopsys (uMCTL2) | drivers/ram/stm32mp1/stm32mp1_ddr.c |
DT Preprocessor Templates |
| TI AM625 SK / BeaglePlay | Cadence (DDRSS) | drivers/ram/k3-ddrss/k3-ddrss.c |
Massive DT Macro Arrays |
| Xilinx ZCU102 (ZynqMP) | Synopsys (uMCTL2) | board/xilinx/zynqmp/psu_init_gpl.c |
Auto-generated Raw Register Writes |
| Rockchip RK3399 Sapphire | Synopsys (PUBL) | drivers/ram/rockchip/sdram_rk3399.c |
Structured C Driver |
| Aspeed AST2700 EVB | Synopsys (uMCTL2) | drivers/ram/aspeed/sdram_ast2700.c |
Hybrid C and Vendor PHY Init |
| Intel Stratix 10 / Agilex | Synopsys (uMCTL2) | drivers/ddr/altera/sdram_s10.c |
Handoff-based Controller Setup |
| NXP Layerscape (LS1046A) | Freescale (Proprietary) | drivers/ddr/fsl/main.c |
JEDEC SPD-driven Generic Logic |
| MediaTek MT7629 | MediaTek (Proprietary) | drivers/ram/mediatek/ddr3-mt7629.c |
Proprietary C Driver |
| Allwinner D1 (Sun20i) | Allwinner (Proprietary) | drivers/ram/sunxi/dram_sun20i_d1.c |
Proprietary C Driver |
| Renesas R-Car Gen3 | Renesas (Proprietary) | drivers/ram/renesas/dbsc5/dram.c |
Proprietary C Driver |
| TI BeagleBone Black (AM335x) | TI (Proprietary/EMIF) | arch/arm/mach-omap2/am33xx/board.c |
Legacy Board-level C Init |
TrustedFirmware-A (formerly arm-trusted-firmware) contains DDR initialization code run during boot as well as runtime code like dynamic voltage and frequency scaling, power management like suspend and resume, error correction code management, and thermal/performance throttling.
| Board / SoC Family | DDR IP Vendor | Initialization Code Location | Implementation Style |
|---|---|---|---|
| ST STM32MP15x (MP157/MP153) | Synopsys (uMCTL2) | drivers/st/ddr/stm32mp1_ram.c |
DT-Driven Init with DDR3/DDR3L/LPDDR2/LPDDR3 Support |
| ST STM32MP2x (MP25x) | Synopsys (uMCTL2) | drivers/st/ddr/stm32mp2_ram.c |
DT-Driven Init with DDR4/LPDDR4 Support + PHY Structs |
| Intel Stratix 10 / Agilex | Synopsys (uMCTL2) | plat/intel/soc/common/drivers/ddr/ddr.c |
IOSSM Mailbox Interface (Abstracted) |
| Intel Agilex5 / Agilex7M | Synopsys (uMCTL2) | plat/intel/soc/agilex5/soc/agilex5_ddr.c |
IOSSM Mailbox + Handoff from SPL |
| Rockchip RK3399 | Synopsys (PUBL PHY) | plat/rockchip/rk3399/drivers/dram/ |
Timing Tables + Training (DDR3/LPDDR3/LPDDR4) |
| NXP Layerscape (LS1046A/LS1088A) | NXP (Proprietary) | plat/nxp/soc-ls1046a/*/ddr_init.c |
Board-Specific Init + FSL DDR Controller |
| NXP i.MX8ULP | Cadence (DDRSS/Denali) | plat/imx/imx8ulp/dram.c |
Structured C / Denali Register Sequence |
| Renesas R-Car (H3/M3) | Renesas (Proprietary) | drivers/renesas/common/ddr/ddr_b/boot_init_dram.c |
Structured C with Massive Header-defined Register Tables |
| Marvell Armada A8K | Marvell (mv_ddr) |
plat/marvell/armada/a8k/.../dram_port.c |
Structured C Topology Map (mv_ddr Library) |
| Board / SoC Family | DDR IP Vendor | Initialization Code Location | Implementation Style |
|---|---|---|---|
| Rockchip RK3399 Sapphire | Synopsys (PUBL PHY) | src/soc/rockchip/rk3399/sdram.c |
Native C Driver with PHY Training |
| Rockchip RK3288 Firefly | Synopsys (PUBL PHY) | src/soc/rockchip/rk3288/sdram.c |
Native C Driver |
| SiFive FU540 / FU740 | Cadence (Denali) | src/soc/sifive/fu540/sdram.c |
Denali Controller + PHY Register Write |
| Nvidia Tegra210 / T124 | Nvidia (Proprietary) | src/soc/nvidia/tegra210/sdram.c |
Proprietary C Driver + Training Blob |
| MediaTek MT8192 / MT8195 | MediaTek (Proprietary) | src/soc/mediatek/common/memory.c |
Loads Proprietary DRAM Blob from CBFS |
| Qualcomm IPQ40xx / IPQ806x | Qualcomm (Proprietary) | src/soc/qualcomm/ipq40xx/blobs_init.c |
Loads Vendor Blob from CBFS |
| Intel Broadwell | Intel (Proprietary) | src/soc/intel/broadwell/raminit.c |
Runs Intel MRC (Memory Reference Code) Binary |
| Cavium CN81xx / ThunderX | Cavium (Proprietary) | src/soc/cavium/cn81xx/sdram.c |
Proprietary BDK (Board Development Kit) Library |
| TI AM335x | TI (EMIF4) | src/soc/ti/am335x/sdram.c |
Structured C (U-Boot style) |
| AMD Picasso / Cezanne | AMD (FSP-based) | src/soc/amd/picasso/fsp_m_params.c |
Firmware-only (FSP-M) |
| Intel Alder Lake / Tiger Lake | Intel (FSP-based) | src/soc/intel/alderlake/romstage/romstage.c |
Firmware-only (FSP-M) |
| Qualcomm SC7180 / SC7280 | Qualcomm (Proprietary) | src/soc/qualcomm/sc7180/qclib.c |
Firmware-only (QCLib) |